Director Analyst - Semiconductor Foundry and Advanced Packaging
Gartner · Remote (Asia-Pacific & Middle East)
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About the role
About This Role
Analysts create must-have insights for our clients through published research and client interactions. You will meet with clients every day, whether by phone, videoconference, on stage at a Gartner event, or face-to-face during a sales support visit. In every interaction, you will help clients overcome their challenges and perform better.
As part of Gartner’s Emerging Market Dynamics Group, you will equip leaders in the semiconductor memory industry with indispensable insights, advice, and tools to achieve their mission-critical priorities and build the successful organizations of tomorrow.
You will own the quantitative and market-intelligence view of global foundry and advanced packaging capacity, technology transitions, and economics, and translate manufacturing constraints into implications for semiconductor supply and competitive strategy.
What You’ll Do
Develop and maintain market forecasts for global foundry capacity, wafer demand, utilization, revenue, and market share.
Track leading-edge and mature-node capacity across TSMC, Samsung, Intel Foundry, GlobalFoundries, UMC, SMIC, and other relevant suppliers.
Analyze process-node migration, fab expansions, capex, utilization, pricing, and customer allocation.
Maintain market intelligence on advanced packaging, including 2.5D/3D integration, CoWoS-class packaging, chiplets, hybrid bonding, fan-out, and advanced substrates.
Quantify packaging capacity, throughput, utilization, supplier share, and technology migration.
Track the interaction between foundry, HBM, substrates, OSAT/test, and advanced packaging constraints.
Analyze how AI accelerators, custom ASICs, CPUs, GPUs, and other high-performance devices translate into wafer and packaging demand.
Monitor customer/supplier relationships, capacity commitments, geographic expansion, and semiconductor localization strategies.
Maintain quarterly trackers, forecasts, supplier databases, and scenario models.
Identify emerging capacity bottlenecks and assess their implications for availability, pricing, and competitive positioning.
Support client inquiries and produce differentiated research for VP, market-intelligence, and strategic audiences.
Collaborate with analysts covering AI accelerators, memory, semiconductor equipment, interconnect, and infrastructure economics.
Actively participate in appropriate Gartner global research communities for formal and informal knowledge-sharing sessions.
Educational Qualifications
BE/BTech from Grade A engineering colleges with specialization in Electronics, Semiconductors, or Software Engineering.
Graduate + MBA in Marketing or Operations from leading A and B-schools is desirable.
Work Experience
10-12+ years of experience in semiconductor foundry, advanced packaging, manufacturing strategy, market intelligence, product planning, or industry research.
Domain Knowledge / Business Acumen
Strong knowledge of semiconductor process technology, capacity planning, and advanced packaging.
Understanding of foundry economics, yield, utilization, node migration, and customer allocation.
Experience building quantitative market models and forecasts.
Familiarity with TSMC, Samsung, Intel Foundry, GlobalFoundries, UMC, SMIC, ASE, Amkor, and other major ecosystem participants.
Strong ability to connect manufacturing detail with market, competitive, and financial implications.
Excellent written and verbal communication skills.
Ability to challenge prevailing industry assumptions using evidence and quantitative analysis.
Continued in Gartner’s original posting ↗.
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